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NCP5680
Figure 23. Basic I2C Read Sequence to Extract the STATUS Register
Thermal Shutdown
When the thermal shutdown is engaged, the charge pump
is fully de ? activated and neither the torch/video, nor the
flash can be launched. The rest of the chip is maintained
active in order to keep a full control of the operation, in
particular the SuperCAP bias voltage is active and
Basic I/O Protection Structure
All the pins of the NCP5680 device are ESD protected by
built in diode structure as depicted in Figure 24. Since a
diode is attached between the I/O pin and the supply pin,
the voltage at the I/O pin shall not extend the V CC voltage
plus one Vf drop.
regulated.
+Vcc
Vsw pin
D1
FET_P
DRIVER
FET_N
D1
Vz45V
I/O Pin
D2
FET_N
High Voltage
Structure
GND
GND
GND
Figure 24. Typical ESD Pin Protection Structure
Figure 25. Basic ESD Protection Dedicated to
Power Pin.
Different structures might apply to protect specific pins, in particular the power related functions. In this case, a single
diode based clamp structure can be wired to sustain the ESD specifications as depicted in Figure 25.
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24
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